The present device relates generally to data communications circuits and, in particular, to a universal asynchronous receiver/transmitter (UART), which is operable in alternate modes for use with a various CPUs and peripherals.
Personal computers have a serial port, which is used for bringing data into and out of the computer. The serial port is used for data movement on a channel that requires that one bit be sent or received after another, thus enabling serial communication. The universal asynchronous receiver/transmitter (UART) is a device usually located on an integrated circuit that performs parallel-to-serial conversion of digital data. A UART communicates between parallel and serial forms by converting received data between parallel I/O devices, such as local CPU, and serial I/O devices, such as POTS modems or other transmission lines. Most all traditional UART devices can be programmed to operate at a selected baud rate, and the newer generation UARTs handle the communication more efficiently largely due to larger FIFO depths and improved flow control (fewer retries required and waits for the internal FIFO to fill or empty).
For many applications, upgrading the functionality of a UART device can be problematic. UART devices are typically mounted on the circuit board at the factory and are not easily replaced in the field when a more powerful UART is available. With the development of new, more powerful UART devices, vendors have to manage more product catalog numbers and increased inventory levels until older generation UARTs are discontinued. Moreover, when systems upgrade to a newer, more powerful UART, the system boards must be modified to accommodate the new UART footprint.
Various aspects of the present invention are directed to facilitating efforts to upgrade UART functionality in the field, and to approaches for replacing older UART devices. Additional advantages include permitting UART vendors to reduce significantly UART part numbers and product inventory by providing a UART configurable to operate in various modes. The present invention is exemplified in a number of implementations and applications, some of which are summarized below.
According to an example embodiment of the present invention, an integrated circuit device includes a universal asynchronous receiver/transmitter configured and arranged to operate in one of a plurality of modes, with each mode being selectable in response to mode-selecting data. The integrated circuit device includes an interface circuit electrically connected to the universal asynchronous receiver/transmitter and adapted to present the mode-selecting data to the universal asynchronous receiver/transmitter. The integrated circuit device also includes a selection circuit adapted to enable the mode-selecting data to pass from the interface circuit to the universal asynchronous receiver/transmitter.
More particular implementations of the present invention include providing specific modes selectable by the selection circuit including, as examples, an extended FIFO mode in which a deeper FIFO is activated for use and flow-control information such as the status of data (or lack thereof) in the FIFO.
The above summary is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow more particularly exemplify these embodiments.